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DATE
2008
IEEE
101views Hardware» more  DATE 2008»
16 years 1 months ago
Resilient Dynamic Power Management under Uncertainty
With the increasing levels of variability and randomness in the characteristics and behavior of manufactured nanoscale structures and devices, achieving performance optimization u...
Hwisung Jung, Massoud Pedram
MICRO
2006
IEEE
115views Hardware» more  MICRO 2006»
16 years 26 days ago
Mitigating the Impact of Process Variations on Processor Register Files and Execution Units
Design variability due to die-to-die and within-die process variations has the potential to significantly reduce the maximum operating frequency and the effective yield of high-p...
Xiaoyao Liang, David Brooks
MICRO
1998
IEEE
128views Hardware» more  MICRO 1998»
15 years 11 months ago
Putting the Fill Unit to Work: Dynamic Optimizations for Trace Cache Microprocessors
The fill unit is the structure which collects blocks of instructions and combines them into multi-block segments for storage in a trace cache. In this paper, we expand the role of...
Daniel H. Friendly, Sanjay J. Patel, Yale N. Patt
DAC
2004
ACM
16 years 7 months ago
Design automation for mask programmable fabrics
Programmable circuit design has played an important role in improving design productivity over the last few decades. By imposing structure on the design, efficient automation of s...
Narendra V. Shenoy, Jamil Kawa, Raul Camposano
ICCAD
2006
IEEE
136views Hardware» more  ICCAD 2006»
16 years 3 months ago
An electrothermally-aware full-chip substrate temperature gradient evaluation methodology for leakage dominant technologies with
As CMOS technology scales into the nanometer regime, power dissipation and associated thermal concerns in high-performance ICs due to on-chip hot-spots and thermal gradients are b...
Sheng-Chih Lin, Kaustav Banerjee