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EUROSYS
2007
ACM
16 years 4 months ago
Tashkent+: memory-aware load balancing and update filtering in replicated databases
We present a memory-aware load balancing (MALB) technique to dispatch transactions to replicas in a replicated database. Our MALB algorithm exploits knowledge of the working sets ...
Sameh Elnikety, Steven G. Dropsho, Willy Zwaenepoe...
LCTRTS
2007
Springer
16 years 1 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
CGO
2010
IEEE
16 years 19 days ago
Lightweight feedback-directed cross-module optimization
Cross-module inter-procedural compiler optimization (IPO) and Feedback-Directed Optimization (FDO) are two important compiler techniques delivering solid performance gains. The co...
David Xinliang Li, Raksit Ashok, Robert Hundt
FUNGAMES
2010
15 years 8 months ago
ajME: making game engines autonomic
Autonomic Computing is now showing its value as a solution to the increased complexities of maintaining computer systems and has been applied to many different fields. In this pap...
Pedro Martins, Julie A. McCann
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
16 years 1 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...