Sciweavers

20673 search results - page 3965 / 4135
» Improving Performance on the Internet
Sort
View
RTCSA
2006
IEEE
16 years 17 days ago
Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu...
RTSS
2006
IEEE
16 years 17 days ago
Tightening the Bounds on Feasible Preemption Points
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
RTSS
2006
IEEE
16 years 17 days ago
Process-Aware Interrupt Scheduling and Accounting
In most operating systems, the handling of interrupts is typically performed within the address space of the kernel. Moreover, interrupt handlers are invoked asynchronously during...
Yuting Zhang, Richard West
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
16 years 17 days ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
WIOPT
2006
IEEE
16 years 17 days ago
Scheduling sensor activity for point information coverage in wireless sensor networks
Abstract— An important application of wireless sensor networks is to perform the monitoring missions, for example, to monitor some targets of interests at all times. Sensors are ...
Bang Wang, Kee Chaing Chua, Vikram Srinivasan, Wei...
« Prev « First page 3965 / 4135 Last » Next »