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TPCTC
2010
Springer
147views Hardware» more  TPCTC 2010»
15 years 1 months ago
Assessing and Optimizing Microarchitectural Performance of Event Processing Systems
Abstract. Event Processing (EP) systems are being progressively used in business critical applications in domains such as algorithmic trading, supply chain management, production m...
Marcelo R. N. Mendes, Pedro Bizarro, Paulo Marques
DATE
2005
IEEE
117views Hardware» more  DATE 2005»
16 years 11 days ago
Extended Control Flow Graph Based Performance Optimization Using Scratch-Pad Memory
This paper presents an exploration approach for the researcher to choose the suitable size of Scratch-Pad memory (SPM) for maximal performance improvement of a specified applicat...
Pu Hanlai, Ling Ming, Jin Jing
FPL
2004
Springer
122views Hardware» more  FPL 2004»
16 years 4 days ago
Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path
A high-performance reconfigurable coarse-grain data-path, part of a hybrid reconfigurable platform, is introduced. The data-path consists of coarse grain components that their flex...
Michalis D. Galanis, George Theodoridis, Spyros Tr...
VLSID
1996
IEEE
153views VLSI» more  VLSID 1996»
15 years 11 months ago
Design of high performance two stage CMOS cascode op-amps with stable biasing
The technique of mirror biasing is introduced and applied to a very high gain two stage CMOS cascode op-amp, in order to desensitize its output voltage to bias variations. Various...
Pradip Mandal, V. Visvanathan
GRIDNETS
2008
15 years 7 months ago
A High Performance SOAP Engine for Grid Computing
Web Service technology still has many defects that make its usage for Grid computing problematic, most notably the low performance of the SOAP engine. In this paper, we develop a n...
Ning Wang, Michael Welzl, Liang Zhang