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» Improving Performance of Small On-Chip Instruction Caches
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174
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USENIX
2008
15 years 8 months ago
Vx32: Lightweight User-level Sandboxing on the x86
Code sandboxing is useful for many purposes, but most sandboxing techniques require kernel modifications, do not completely isolate guest code, or incur substantial performance co...
Bryan Ford, Russ Cox
189
Voted
ISCA
2012
IEEE
302views Hardware» more  ISCA 2012»
13 years 8 months ago
Scale-out processors
The emergence of global-scale online services has galvanized scale-out software, characterized by splitting vast datasets and massive computation across many independent servers. ...
Pejman Lotfi-Kamran, Boris Grot, Michael Ferdman, ...
199
Voted
VLDB
1999
ACM
145views Database» more  VLDB 1999»
15 years 10 months ago
DBMSs on a Modern Processor: Where Does Time Go?
Recent high-performance processors employ sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. Intuitively, these techniques ...
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill...
165
Voted
ICPP
2007
IEEE
16 years 14 days ago
COBRA: An Adaptive Runtime Binary Optimization Framework for Multithreaded Applications
This paper presents COBRA (Continuous Binary ReAdaptation), a runtime binary optimization framework, for multithreaded applications. It is currently implemented on Itanium 2 based...
Jinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew
149
Voted
ISLPED
2005
ACM
87views Hardware» more  ISLPED 2005»
15 years 11 months ago
Runtime identification of microprocessor energy saving opportunities
High power consumption and low energy efficiency have become significant impediments to future performance improvements in modern microprocessors. This paper contributes to the so...
W. L. Bircher, M. Valluri, J. Law, L. K. John