Sciweavers

3829 search results - page 321 / 766
» Improving Our Reviewing Processes
Sort
View
ICPP
2003
IEEE
15 years 12 months ago
Scheduling Algorithms with Bus Bandwidth Considerations for SMPs
The bus that connects processors to memory is known to be a major architectural bottleneck in SMPs. However, both software and scheduling policies for these systems generally focu...
Christos D. Antonopoulos, Dimitrios S. Nikolopoulo...
NAACL
2003
15 years 8 months ago
In Question Answering, Two Heads Are Better Than One
Motivated by the success of ensemble methods in machine learning and other areas of natural language processing, we developed a multistrategy and multi-source approach to question...
Jennifer Chu-Carroll, Krzysztof Czuba, John M. Pra...
FGCS
1998
91views more  FGCS 1998»
15 years 6 months ago
Computational steering in the CAVE
Scientists can gain much more insight from their simulations if they are enabled to change simulation parameters on the y while observing the results immediately. A crucial aspect...
Jurriaan D. Mulder, Robert van Liere, Jarke J. van...
ICCV
2011
IEEE
14 years 6 months ago
Simultaneous Correspondence and Non-Rigid 3D Reconstruction of the Coronary Tree from Single X-ray Images
We present a novel approach to simultaneously reconstruct the 3D structure of a non-rigid coronary tree and estimate point correspondences between an input X-ray image and a refer...
Eduard Serradell (Institut de Robotica i Informati...
ECRTS
2008
IEEE
16 years 1 months ago
Predictable Code and Data Paging for Real Time Systems
There is a need for using virtual memory in real-time applications: using virtual addressing provides isolation between concurrent processes; in addition, paging allows the execut...
Damien Hardy, Isabelle Puaut