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DSD
2009
IEEE
90views Hardware» more  DSD 2009»
16 years 1 months ago
Instruction Precomputation for Fault Detection
—Fault tolerance (FT) is becoming increasingly important in computing systems. This work proposes and evaluates the instruction precomputation technique to detect hardware faults...
Demid Borodin, Ben H. H. Juurlink, Stefanos Kaxira...
IPPS
2002
IEEE
15 years 11 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...
MICRO
1997
IEEE
127views Hardware» more  MICRO 1997»
15 years 10 months ago
Exploiting Dead Value Information
We describe Dead Value Information (DVI) and introduce three new optimizations which exploit it. DVI provides assertions that certain register values are dead, meaning they will n...
Milo M. K. Martin, Amir Roth, Charles N. Fischer
EH
2003
IEEE
127views Hardware» more  EH 2003»
15 years 11 months ago
Comparing Different Serial and Parallel Heuristics to Design Combinational Logic Circuits
In this paper, we perform a comparative study of different heuristics used to design combinational logic circuits. The use of local search hybridized with a genetic algorithm and ...
Carlos A. Coello Coello, Enrique Alba, Gabriel Luq...
FCCM
2009
IEEE
169views VLSI» more  FCCM 2009»
16 years 1 months ago
RC-BLASTn: Implementation and Evaluation of the BLASTn Scan Function
BLASTn is a tool universally used by biologists to identify similarities between nucleotide based biological genome sequences. This report describes an FPGA based hardware impleme...
Siddhartha Datta, Parag Beeraka, Ron Sass