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ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
16 years 3 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
ICCAD
2007
IEEE
91views Hardware» more  ICCAD 2007»
16 years 3 months ago
Variation-aware task allocation and scheduling for MPSoC
— As technology scales, the delay uncertainty caused by process variations has become increasingly pronounced in deep submicron designs. As a result, a paradigm shift from determ...
Feng Wang 0004, Chrysostomos Nicopoulos, Xiaoxia W...
ASPDAC
2009
ACM
155views Hardware» more  ASPDAC 2009»
16 years 1 months ago
Variation-aware resource sharing and binding in behavioral synthesis
— As technology scales, the delay uncertainty caused by process variations has become increasingly pronounced in deep submicron designs. In the presence of process variations, wo...
Feng Wang 0004, Yuan Xie, Andres Takach
ICDCS
2002
IEEE
15 years 11 months ago
Incremental Replication for Mobility Support in OBIWAN
The need for sharing is well known in a large number of distributed collaborative applications. These applications are difficult to develop for wide area (possibly mobile) networ...
Luís Veiga, Paulo Ferreira
ECOOP
1997
Springer
15 years 10 months ago
Near Optimal Hierarchical Encoding of Types
A type inclusion test is a procedure to decide whether two types are related by a given subtyping relationship. An efficient implementation of the type inclusion test plays an impo...
Andreas Krall, Jan Vitek, R. Nigel Horspool