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ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
15 years 11 months ago
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
Ho-Seop Kim, James E. Smith
USENIX
2008
15 years 8 months ago
LeakSurvivor: Towards Safely Tolerating Memory Leaks for Garbage-Collected Languages
Continuous memory leaks severely hurt program performance and software availability for garbage-collected programs. This paper presents a safe method, called LeakSurvivor, to tole...
Yan Tang, Qi Gao, Feng Qin
HPCA
1998
IEEE
15 years 10 months ago
Using Multicast and Multithreading to Reduce Communication in Software DSM Systems
This paper examines the performance benefits of employing multicast communication and application-level multithreading in the Brazos software distributed shared memory (DSM) syste...
Evan Speight, John K. Bennett
SIPS
2006
IEEE
16 years 15 days ago
Automated Architectural Exploration for Signal Processing Algorithms
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...
ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
16 years 2 days ago
An ILP Formulation for Reliability-Oriented High-Level Synthesis
Reliability decisions taken early in system design can bring significant benefits in terms of design quality. This paper presents a 0-1 integer linear programming (ILP) formulatio...
Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Er...