2032 search results - page 186 / 407 » Improving Java performance using hardware translation |
147
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DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
We present a technique to improve the efficiency of hardware-software cosimulation, using design information known at simulator compile-time. The generic term for such optimizatio...
139
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ASPDAC
2008
ACM
15 years 8 months ago
2008
ACM
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates the verification of digital circuits us...
178
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ICES
1998
Springer
15 years 10 months ago
1998
Springer
In this paper we present a new chromosome representation for evolving digital circuits. The representation is based very closely on the chip architecture of the Xilinx 6216 FPGA. W...
165
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DSD
2008
IEEE
15 years 8 months ago
2008
IEEE
The aim of this work is to present a method for rounding quadratically converging algorithms that improves their performance. This method is able to reduce significantly the numbe...
186
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IPPS
2005
IEEE
16 years 2 days ago
2005
IEEE
This paper presents a hardware architecture for Multi Protocol Label Switching (MPLS). MPLS is a protocol used primarily to prioritize internet traffic and improve bandwidth utili...