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ISPASS
2010
IEEE
16 years 1 months ago
Cache contention and application performance prediction for multi-core systems
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
Chi Xu, Xi Chen, Robert P. Dick, Zhuoqing Morley M...
ITCC
2005
IEEE
16 years 1 days ago
A Parallelized Design for an Elliptic Curve Cryptosystem Coprocessor
In many applications a software implementation of ECC (Elliptic Curve Cryptography) might be inappropriate due to performance requirements, therefore hardware implementations are ...
Fabio Sozzani, Guido Bertoni, Stefano Turcato, Luc...
IPPS
2010
IEEE
15 years 4 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...
ICCD
2004
IEEE
111views Hardware» more  ICCD 2004»
16 years 3 months ago
Potential Slack Budgeting with Clock Skew Optimization
Potential slack is an effective metric of circuit’s possible performance improvement. It is equal to the maximal amount of slack that can be potentially used for optimization. I...
Kai Wang, Malgorzata Marek-Sadowska
ISCAS
2006
IEEE
87views Hardware» more  ISCAS 2006»
16 years 14 days ago
Error-resilience transcoding using content-aware intra-refresh based on profit tracing
— In this paper, we present a two-pass error-resilience transcoding scheme based on content-aware intra-refresh (CAIR) for inserting error-resilience features to a compressed vid...
Chih-Ming Chen, Yung-Chang Chen, Chia-Wen Lin