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EMSOFT
2005
Springer
15 years 12 months ago
Compiler-guided register reliability improvement against soft errors
With the scaling of technology, transient errors caused by external particle strikes have become a critical challenge for microprocessor design. As embedded processors are widely ...
Jun Yan, Wei Zhang
ICCD
1997
IEEE
78views Hardware» more  ICCD 1997»
15 years 10 months ago
Speeding up Variable Reordering of OBDDs
In this paper, we suggest a block-restricted sifting strategy which is based on the restriction of Rudell's sifting to certain blocks of variables. The application of this st...
Christoph Meinel, Anna Slobodová
IPCCC
2006
IEEE
16 years 14 days ago
OS-aware tuning: improving instruction cache energy efficiency on system workloads
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
Tao Li, Lizy K. John
IWOMP
2010
Springer
15 years 11 months ago
A ROSE-Based OpenMP 3.0 Research Compiler Supporting Multiple Runtime Libraries
OpenMP is a popular and evolving programming model for shared-memory platforms. It relies on compilers to target modern hardware architectures for optimal performance. A variety of...
Chunhua Liao, Daniel J. Quinlan, Thomas Panas, Bro...
ASPDAC
2005
ACM
142views Hardware» more  ASPDAC 2005»
15 years 8 months ago
An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks
– We propose a System-on-Chip (SoC) architecture for reconfigurable applications based on the AMBA HighSpeed Bus (AHB). The architecture features multiple low-area flyby DMA bloc...
Adeoye Olugbon, Sami Khawam, Tughrul Arslan, Ioann...