2032 search results - page 136 / 407 » Improving Java performance using hardware translation |
139
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DDECS
2006
IEEE
16 years 13 days ago
2006
IEEE
- This paper presents a carry lookahead (CLA) circuitry design based on dynamic circuit aiming at delay reduction in addition of BCD coded decimal numbers. The performance of the p...
127
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ASPDAC
1999
ACM
15 years 10 months ago
1999
ACM
We present a timing optimization algorithm based on the concept of gate duplication on the technologydecomposed network. We first examine the relationship between gate duplication...
197
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IWMM
2011
Springer
14 years 9 months ago
2011
Springer
We propose a new memory model called short-term memory for managing objects on the heap. In contrast to the traditional persistent memory model for heap management, objects in sho...
142
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ICMCS
2006
IEEE
16 years 13 days ago
2006
IEEE
Radio hardware used for the reception of 802.11b frames is capable of associating a Signal to Silence Ratio (SSR) with each received frame. If a received frame is corrupted, then ...
198
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SIGMETRICS
2003
ACM
15 years 11 months ago
2003
ACM
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...