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IPPS
2006
IEEE
16 years 24 days ago
Improving cache locality for thread-level speculation
With the advent of chip-multiprocessors (CMPs), Thread-Level Speculation (TLS) remains a promising technique for exploiting this highly multithreaded hardware to improve the perfo...
Stanley L. C. Fung, J. Gregory Steffan
SIGIR
2006
ACM
16 years 21 days ago
Improving the estimation of relevance models using large external corpora
Information retrieval algorithms leverage various collection statistics to improve performance. Because these statistics are often computed on a relatively small evaluation corpus...
Fernando Diaz, Donald Metzler
AIIDE
2009
15 years 7 months ago
Improving Offensive Performance Through Opponent Modeling
Although in theory opponent modeling can be useful in any adversarial domain, in practice it is both difficult to do accurately and to use effectively to improve game play. In thi...
Kennard Laviers, Gita Sukthankar, David W. Aha, Ma...
ICDE
2004
IEEE
119views Database» more  ICDE 2004»
16 years 8 months ago
Improving Logging and Recovery Performance in Phoenix/App
Phoenix/App supports software components whose states are made persistent across a system crash via redo recovery, replaying logged interactions. Our initial prototype force logge...
Roger S. Barga, Shimin Chen, David B. Lomet
ICPP
2007
IEEE
16 years 1 months ago
Fault-Driven Re-Scheduling For Improving System-level Fault Resilience
The productivity of HPC system is determined not only by their performance, but also by their reliability. The conventional method to limit the impact of failures is checkpointing...
Yawei Li, Prashasta Gujrati, Zhiling Lan, Xian-He ...