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» Improvement of ASIC Design Processes
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TCAD
1998
114views more  TCAD 1998»
15 years 5 months ago
Behavioral optimization using the manipulation of timing constraints
— We introduce a transformation, named rephasing, that manipulates the timing parameters in control-data-flow graphs (CDFG’s) during the high-level synthesis of data-pathinten...
Miodrag Potkonjak, Mani B. Srivastava
TVLSI
2002
144views more  TVLSI 2002»
15 years 5 months ago
On-chip inductance cons and pros
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
Yehea I. Ismail
SCFBM
2008
112views more  SCFBM 2008»
15 years 5 months ago
The Multiscale Systems Immunology project: software for cell-based immunological simulation
Background: Computer simulations are of increasing importance in modeling biological phenomena. Their purpose is to predict behavior and guide future experiments. The aim of this ...
Faheem Mitha, Timothy A. Lucas, Feng Feng, Thomas ...
SIGSOFT
2010
ACM
15 years 3 months ago
Finding latent performance bugs in systems implementations
Robust distributed systems commonly employ high-level recovery mechanisms enabling the system to recover from a wide variety of problematic environmental conditions such as node f...
Charles Edwin Killian, Karthik Nagaraj, Salman Per...
JSA
2010
173views more  JSA 2010»
15 years 24 days ago
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...
Quentin L. Meunier, Frédéric P&eacut...