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» Improvement of ASIC Design Processes
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ISCA
2002
IEEE
112views Hardware» more  ISCA 2002»
15 years 11 months ago
Drowsy Caches: Simple Techniques for Reducing Leakage Power
On-chip caches represent a sizable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potential...
Krisztián Flautner, Nam Sung Kim, Steven M....
ISCA
2002
IEEE
82views Hardware» more  ISCA 2002»
15 years 11 months ago
Increasing Processor Performance by Implementing Deeper Pipelines
One architectural method for increasing processor performance involves increasing the frequency by implementing deeper pipelines. This paper will explore the relationship between ...
Eric Sprangle, Doug Carmean
ISCAS
2002
IEEE
85views Hardware» more  ISCAS 2002»
15 years 11 months ago
A wide-linear-range subthreshold CMOS transconductor employing the back-gate effect
We present a CMOS circuit that utilizes the back-gate effect to extend the linear range of a subthreshold MOS transconductor. Previous designs of wide-linear-range transconductors...
Reid R. Harrison
ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
15 years 11 months ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
IV
2002
IEEE
65views Visualization» more  IV 2002»
15 years 11 months ago
Visual Information Retrieval with the SuperTable + Scatterplot
We present a new visualization approach for metadata combining different visualizations into a so-called SuperTable accompanied by a Scatterplot. The goal is to improve user exper...
Peter Klein, Frank Müller, Harald Reiterer, M...