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DATE
1999
IEEE
73views Hardware» more  DATE 1999»
15 years 10 months ago
Channel-Based Behavioral Test Synthesis for Improved Module Reachability
We introduce a novel behavioral test synthesis methodology that attempts to increase module reachability, driven by powerful global design path analysis. Based on the notion of tr...
Yiorgos Makris, Alex Orailoglu
ICRA
2008
IEEE
160views Robotics» more  ICRA 2008»
16 years 22 days ago
A constrained optimization approach to virtual fixtures for multi-handed tasks
— In this work, we have extended the concept of constrained motion control of robots to surgical tasks that require multiple robots. We present virtual fixtures to guide the mot...
Ankur Kapoor, Russell H. Taylor
INFOCOM
2005
IEEE
15 years 12 months ago
Joint congestion control and media access control design for ad hoc wireless networks
Abstract— We present a model for the joint design of congestion control and media access control (MAC) for ad hoc wireless networks. Using contention graph and contention matrix,...
Lijun Chen, Steven H. Low, John C. Doyle
PUK
2000
15 years 7 months ago
Dynamic Scheduling of Progressive Processing Plans
Progressive processing plans allow systems to tradeoff computational resources against the quality of service by specifying alternative ways in which to accomplish each step. When ...
Shlomo Zilberstein, Abdel-Illah Mouaddib, Andrew A...
SPAA
1995
ACM
15 years 9 months ago
Provably Efficient Scheduling for Languages with Fine-Grained Parallelism
Many high-level parallel programming languages allow for fine-grained parallelism. As in the popular work-time framework for parallel algorithm design, programs written in such lan...
Guy E. Blelloch, Phillip B. Gibbons, Yossi Matias