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SOSP
2001
ACM
16 years 3 months ago
Resilient Overlay Networks
A Resilient Overlay Network (RON) is an architecture that allows distributed Internet applications to detect and recover from path outages and periods of degraded performance with...
David G. Andersen, Hari Balakrishnan, M. Frans Kaa...
LCTRTS
2007
Springer
16 years 16 days ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
ISCA
2005
IEEE
98views Hardware» more  ISCA 2005»
16 years 6 hour ago
Techniques for Efficient Processing in Runahead Execution Engines
Runahead execution is a technique that improves processor performance by pre-executing the running application instead of stalling the processor when a long-latency cache miss occ...
Onur Mutlu, Hyesoon Kim, Yale N. Patt
CGO
2010
IEEE
15 years 11 months ago
Lightweight feedback-directed cross-module optimization
Cross-module inter-procedural compiler optimization (IPO) and Feedback-Directed Optimization (FDO) are two important compiler techniques delivering solid performance gains. The co...
David Xinliang Li, Raksit Ashok, Robert Hundt
CORR
2002
Springer
114views Education» more  CORR 2002»
15 years 6 months ago
Offline Specialisation in Prolog Using a Hand-Written Compiler Generator
The so called "cogen approach" to program specialisation, writing a compiler generator instead of a specialiser, has been used with considerable success in partial evalu...
Michael Leuschel, Jesper Jørgensen, Wim Van...