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GLVLSI
2003
IEEE
134views VLSI» more  GLVLSI 2003»
16 years 3 days ago
Modeling QCA for area minimization in logic synthesis
Concerned by the wall that Moore’s Law is expected to hit in the next decade, the integrated circuit community is turning to emerging nanotechnologies for continued device impro...
Nadine Gergel, Shana Craft, John Lach
GLVLSI
2003
IEEE
146views VLSI» more  GLVLSI 2003»
16 years 3 days ago
A practical CAD technique for reducing power/ground noise in DSM circuits
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
Arindam Mukherjee, Krishna Reddy Dusety, Rajsaktis...
HICSS
2003
IEEE
151views Biometrics» more  HICSS 2003»
16 years 3 days ago
An Evaluation of Applying Use Cases to Construct Design versus Validate Design
Use case models capture and describe the functional requirements of a software system. A use case driven development process, where a use case model is the principal basis for con...
Erik Syversen, Bente Anda, Dag I. K. Sjøber...
ICDCSW
2003
IEEE
16 years 3 days ago
CATP: A Context-Aware Transportation Protocol for HTTP
— The rendering mechanism used in Web browsers have a significant impact on the user behavior and delay tolerance of retrieval. The head-of-line blocking phenomena prevents the ...
Huamin Chen, Prasant Mohapatra
ICPP
2003
IEEE
16 years 3 days ago
A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between proces...
Xiaotong Zhuang, Hsien-Hsin S. Lee
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