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152
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ICCD
2007
IEEE
161views Hardware» more  ICCD 2007»
16 years 3 months ago
Scan chain design for three-dimensional integrated circuits (3D ICs)
Scan chains are widely used to improve the testability of IC designs. In traditional 2D IC designs, various design techniques on the construction of scan chains have been proposed...
Xiaoxia Wu, Paul Falkenstern, Yuan Xie
ICCAD
2008
IEEE
170views Hardware» more  ICCAD 2008»
16 years 3 months ago
Obstacle-avoiding rectilinear Steiner tree construction
— In today’s VLSI designs, there can be many blockages in a routing region. The obstacle-avoiding rectilinear Steiner minimum tree (OARSMT) problem has become an important prob...
Liang Li, Evangeline F. Y. Young
180
Voted
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
16 years 3 months ago
Platform-based resource binding using a distributed register-file microarchitecture
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...
Jason Cong, Yiping Fan, Wei Jiang
163
Voted
ICCAD
2006
IEEE
119views Hardware» more  ICCAD 2006»
16 years 3 months ago
FastRoute: a step to integrate global routing into placement
Because of the increasing dominance of interconnect issues in advanced IC technology, placement has become a critical step in the IC design flow. To get accurate interconnect inf...
Min Pan, Chris C. N. Chu
159
Voted
ICCAD
2003
IEEE
109views Hardware» more  ICCAD 2003»
16 years 3 months ago
Large-Scale Circuit Placement: Gap and Promise
Placement is one of the most important steps in the RTLto-GDSII synthesis process, as it directly defines the interconnects, which have become the bottleneck in circuit and syste...
Jason Cong, Tim Kong, Joseph R. Shinnerl, Min Xie,...
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