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HEURISTICS
2008
92views more  HEURISTICS 2008»
15 years 6 months ago
Learning heuristics for basic block instruction scheduling
Instruction scheduling is an important step for improving the performance of object code produced by a compiler. A fundamental problem that arises in instruction scheduling is to ...
Abid M. Malik, Tyrel Russell, Michael Chase, Peter...
DAC
2004
ACM
16 years 7 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
CODES
2005
IEEE
16 years 13 days ago
Shift buffering technique for automatic code synthesis from synchronous dataflow graphs
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...
Hyunok Oh, Nikil D. Dutt, Soonhoi Ha
WSCG
2004
161views more  WSCG 2004»
15 years 8 months ago
Rendering Techniques for Hardware-Accelerated Image-Based CSG
Image-based CSG rendering algorithms for standard graphics hardware rely on multipass rendering that includes reading and writing large amounts of pixel data from and to the frame...
Florian Kirsch, Jürgen Döllner
IV
1999
IEEE
151views Visualization» more  IV 1999»
15 years 11 months ago
Occlusion Culling Using Minimum Occluder Set and Opacity Map
The aim of occlusion culling is to cull away a significant amount of invisible primitives at different viewpoints. We present two algorithms to improve occlusion culling for a hig...
Poon Chun Ho, Wenping Wang