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ICCAD
2003
IEEE
129views Hardware» more  ICCAD 2003»
16 years 3 days ago
Performance Optimization of Latency Insensitive Systems Through Buffer Queue Sizing of Communication Channels
This paper proposes for latency insensitive systems a performance optimization technique called channel buffer queue sizing, which is performed after relay station insertion in th...
Ruibing Lu, Cheng-Kok Koh
EUROPAR
2001
Springer
15 years 11 months ago
Performance of High-Accuracy PDE Solvers on a Self-Optimizing NUMA Architecture
High-accuracy PDE solvers use multi-dimensional fast Fourier transforms. The FFTs exhibits a static and structured memory access pattern which results in a large amount of communic...
Sverker Holmgren, Dan Wallin
CEC
2011
IEEE
14 years 6 months ago
Effective ranking + speciation = Many-objective optimization
—Multiobjective optimization problems have been widely addressed using evolutionary computation techniques. However, when dealing with more than three conflicting objectives (th...
Mario Garza-Fabre, Gregorio Toscano Pulido, Carlos...
DAC
2009
ACM
16 years 1 months ago
Throughput optimal task allocation under thermal constraints for multi-core processors
It is known that temperature gradients and thermal hotspots affect the reliability of microprocessors. Temperature is also an important constraint when maximizing the performance...
Vinay Hanumaiah, Ravishankar Rao, Sarma B. K. Vrud...
ICNS
2007
IEEE
16 years 1 months ago
Towards System-level Optimization for High Performance Unified Threat Management
To build holistic protection against complex and blended network threats, multiple security features need to be integrated into a unified security architecture, which requires in ...
Yaxuan Qi, Baohua Yang, Bo Xu, Jun Li