581 search results - page 23 / 117 » Implementing the Best Processor Cores |
138
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CC
2007
Springer
16 years 4 days ago
2007
Springer
To achieve high resource utilization for multi-issue Digital Signal Processors (DSPs), production compilers commonly include variants of the iterative modulo scheduling algorithm. ...
164
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ASPLOS
2008
ACM
15 years 8 months ago
2008
ACM
In this paper we propose the Merge framework, a general purpose programming model for heterogeneous multi-core systems. The Merge framework replaces current ad hoc approaches to p...
155
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CODES
2005
IEEE
15 years 11 months ago
2005
IEEE
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
114
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ICIP
2005
IEEE
16 years 7 months ago
2005
IEEE
This paper describes the architecture of an 8x8 2-D DCT/IDCT processor with high throughput, reduced hardware, and a parallel-pipeline scheme. This architecture allows the process...
143
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ICAS
2008
IEEE
16 years 13 days ago
2008
IEEE
—Based on insights from the implementation of commercial products for data-centre resource management, we identified key challenges in the development of cost-effective autonomi...