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» Implementing Signatures for C
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FPGA
2006
ACM
90views FPGA» more  FPGA 2006»
15 years 10 months ago
Improving performance and robustness of domain-specific CPLDs
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
Mark Holland, Scott Hauck
CASES
2001
ACM
15 years 10 months ago
Storage allocation for embedded processors
In an embedded system, it is common to have several memory areas with different properties, such as access time and size. An access to a specific memory area is usually restricted...
Jan Sjödin, Carl von Platen
CAV
2003
Springer
188views Hardware» more  CAV 2003»
15 years 10 months ago
Thread-Modular Abstraction Refinement
odular Abstraction Refinement Thomas A. Henzinger1 , Ranjit Jhala1 , Rupak Majumdar1 , and Shaz Qadeer2 1 University of California, Berkeley 2 Microsoft Research, Redmond Abstract....
Thomas A. Henzinger, Ranjit Jhala, Rupak Majumdar,...
ICS
2000
Tsinghua U.
15 years 10 months ago
Automatic loop transformations and parallelization for Java
From a software engineering perspective, the Java programming language provides an attractive platform for writing numerically intensive applications. A major drawback hampering i...
Pedro V. Artigas, Manish Gupta, Samuel P. Midkiff,...
CNSR
2010
IEEE
164views Communications» more  CNSR 2010»
15 years 9 months ago
Buffered Crossbar Fabrics Based on Networks on Chip
— Buffered crossbar (CICQ) switches have shown a high potential in scaling Internet routers capacity. However, they require expensive on-chip buffers whose cost grows quadratical...
Lotfi Mhamdi, Kees Goossens, Iria Varela Senin