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ASPLOS
2000
ACM
15 years 11 months ago
Evaluating Design Alternatives for Reliable Communication on High-Speed Networks
We systematically evaluate the performance of five implementations of a single, user-level communication interface. Each implementation makes different architectural assumptions ...
Raoul Bhoedjang, Kees Verstoep, Tim Rühl, Hen...
ARITH
1999
IEEE
15 years 11 months ago
Reduced Latency IEEE Floating-Point Standard Adder Architectures
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
Andrew Beaumont-Smith, Neil Burgess, S. Lefrere, C...
MICRO
1999
IEEE
108views Hardware» more  MICRO 1999»
15 years 11 months ago
Exploiting ILP in Page-based Intelligent Memory
This study compares the speed, area, and power of di erent implementations of Active Pages OCS98], an intelligent memory system which helps bridge the growing gap between processo...
Mark Oskin, Justin Hensley, Diana Keen, Frederic T...
173
Voted
EMSOFT
2006
Springer
15 years 10 months ago
A hierarchical coordination language for interacting real-time tasks
We designed and implemented a new programming language called Hierarchical Timing Language (HTL) for hard realtime systems. Critical timing constraints are specified within the la...
Arkadeb Ghosal, Alberto L. Sangiovanni-Vincentelli...
218
Voted
FCCM
2006
IEEE
170views VLSI» more  FCCM 2006»
15 years 10 months ago
An Architecture for Efficient Hardware Data Mining using Reconfigurable Computing Systems
The Apriori algorithm is a fundamental correlation-based data mining kernel used in a variety of fields. The innovation in this paper is a highly parallel custom architecture impl...
Zachary K. Baker, Viktor K. Prasanna