We model micro-architectures with non-pipelined instruction processing and pipelined instruction processing, using Maurer machines, basic thread algebra and program algebra. We sho...
Refinement of AbstractSystemC Refinement of Abstract Adaptive Processes for Implementation into Dynamically Reconfigurable Hardwareg F HerreraF. Herrera E. Villar P.A. Hartmann Sli...
Fernando Herrera, Eugenio Villar, Philipp A. Hartm...
We describe a probabilistic polynomial-time process calculus for analyzing cryptographic protocols and use it to derive compositionality properties of protocols in the presence of ...
This paper presents a process variation tolerant, SoC ready, 1GS/s, 6 bit flash analog-to-digital converter (ADC) suitable for integration into nanoscale digital CMOS technologie...
Many researchers are working on various aspects of color imaging. However, it is apparent from the papers published that it is difficult for many of them to produce high quality c...