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» Hybridizing a Logical Framework
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DATE
2003
IEEE
120views Hardware» more  DATE 2003»
15 years 12 months ago
Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step
Abstract — This paper defines a new diagnosis problem for diagnosing delay defects based upon statistical timing models. We illustrate the differences between the delay defect d...
Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-...
ICLP
2003
Springer
15 years 11 months ago
Termination Analysis with Types Is More Accurate
Abstract. In this paper we show how we can use size and groundness analyses lifted to regular and (polymorphic) Hindley/Milner typed programs to determine more accurate termination...
Vitaly Lagoon, Frédéric Mesnard, Pet...
147
Voted
ITC
2002
IEEE
81views Hardware» more  ITC 2002»
15 years 11 months ago
Design Rewiring Using ATPG
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
AADEBUG
2000
Springer
15 years 11 months ago
Value Withdrawal Explanation in CSP
This work is devoted to constraint solving motivated by the debugging of constraint logic programs a la GNU-Prolog. The paper focuses only on the constraints. In this framework, c...
Gérard Ferrand, Willy Lesaint, Alexandre Te...
AGP
1999
IEEE
15 years 11 months ago
Extending clp(FD) by Negative Constraint Solving
In this paper we present a novel extension to the constraint logic programming on Finite Domains (clp(FD)) which combines the usual clp(FD) primitive constraint X in range with a ...
Antonio J. Fernández, Patricia M. Hill