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SRDS
2008
IEEE
16 years 1 months ago
Adaptive Internal Clock Synchronization
Existing clock synchronization algorithms assume a bounded clock reading error. This, in turn, results in an inflexible design that typically requires node crashes whenever the g...
Zbigniew Jerzak, Robert Fach, Christof Fetzer
FPL
2009
Springer
120views Hardware» more  FPL 2009»
15 years 11 months ago
Using 3D integration technology to realize multi-context FPGAs
This paper advocates the use of 3D integration technology to stack a DRAM on top of an FPGA. The DRAM will store future FPGA contexts. A configuration is read from the DRAM into a...
Alessandro Cevrero, Panagiotis Athanasopoulos, Had...
HT
1997
ACM
15 years 10 months ago
Improving the Usability of Hypertext Courseware through Adaptive Linking
Hypertext is being used more and more for on-line course texts. But the navigational freedom offered by a rich link structure is a burdon for students who need guidance throughout...
Licia Calvi, Paul De Bra
HPDC
1993
IEEE
15 years 10 months ago
Programming a Distributed System Using Shared Objects
Building the hardware for a high-performance distributed computer system is a lot easier than building its software. In this paper we describe a model for programtributed systems ...
Andrew S. Tanenbaum, Henri E. Bal, M. Frans Kaasho...
MICRO
1994
IEEE
81views Hardware» more  MICRO 1994»
15 years 10 months ago
Register file port requirements of transport triggered architectures
Exploitation of large amounts of instruction level parallelism requires a large amount of connectivity between the shared register file and the function units; this connectivity i...
Jan Hoogerbrugge, Henk Corporaal