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DATE
2006
IEEE
104views Hardware» more  DATE 2006»
16 years 24 days ago
Integrated placement and skew optimization for rotary clocking
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....
CASES
2006
ACM
16 years 21 days ago
Mitigating soft error failures for multimedia applications by selective data protection
With advances in process technology, soft errors (SE) are becoming an increasingly critical design concern. Due to their large area and high density, caches are worst hit by soft ...
Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, N...
DASFAA
2005
IEEE
209views Database» more  DASFAA 2005»
16 years 10 days ago
PADS: Protein Structure Alignment Using Directional Shape Signatures
A novel approach for similarity search on the protein structure databases is proposed. PADS (Protein Alignment by Directional shape Signatures) incorporates the three dimensional ...
S. Alireza Aghili, Divyakant Agrawal, Amr El Abbad...
MEMOCODE
2005
IEEE
16 years 9 days ago
Extended abstract: a race-free hardware modeling language
We describe race-free properties of a hardware description language called GEZEL. The language describes networks of cycle-true finite-state-machines with datapaths (FSMDs). We de...
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verba...
ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
16 years 9 days ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu
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