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IPPS
1997
IEEE
15 years 11 months ago
Empirical Evaluation of Distributed Mutual Exclusion Algorithms
In this paper, we evaluated various distributed mutual exclusion algorithms on the IBM SP2 machine and the Intel iPSC/860 system. The empirical results are compared in terms of su...
Shiwa S. Fu, Nian-Feng Tzeng, Zhiyuan Li
ISCA
1997
IEEE
96views Hardware» more  ISCA 1997»
15 years 11 months ago
DataScalar Architectures
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
Doug Burger, Stefanos Kaxiras, James R. Goodman
SIGMETRICS
1997
ACM
117views Hardware» more  SIGMETRICS 1997»
15 years 11 months ago
Informed Multi-Process Prefetching and Caching
Informed prefetching and caching based on application disclosure of future I/O accesses (hints) can dramatically reduce the execution time of I/O-intensive applications. A recent ...
Andrew Tomkins, R. Hugo Patterson, Garth A. Gibson
IPPS
1996
IEEE
15 years 11 months ago
Software Techniques for Improving MPP Bulk-Transfer Performance
Brewer and Kuszmaul [BK94] demonstrated how barriers and traffic interleaving can alleviate the problem of bulk-transfer performance degradation on the Thinking Machines CM-5, by ...
Eric A. Brewer, Paul Gauthier, Armando Fox, Angela...
FPGA
1997
ACM
145views FPGA» more  FPGA 1997»
15 years 11 months ago
Generation of Synthetic Sequential Benchmark Circuits
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil