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PAM
2004
Springer
15 years 11 months ago
Measurements and Laboratory Simulations of the Upper DNS Hierarchy
Given that the global DNS system, especially at the higher root and top-levels, experiences significant query loads, we seek to answer the following questions: (1) How does the ch...
Duane Wessels, Marina Fomenkov, Nevil Brownlee, Ki...
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
15 years 11 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
HPCA
1998
IEEE
15 years 10 months ago
The Impact of Data Transfer and Buffering Alternatives on Network Interface Design
The explosive growth in the performance of microprocessors and networks has created a new opportunity to reduce the latency of fine-grain communication. Microprocessor clock speed...
Shubhendu S. Mukherjee, Mark D. Hill
ALT
2003
Springer
15 years 9 months ago
Efficiently Learning the Metric with Side-Information
Abstract. A crucial problem in machine learning is to choose an appropriate representation of data, in a way that emphasizes the relations we are interested in. In many cases this ...
Tijl De Bie, Michinari Momma, Nello Cristianini
OSDI
1994
ACM
15 years 7 months ago
Performance Issues in Parallelized Network Protocols
Parallel processing has been proposed as a means of improving network protocol throughput. Several different strategies have been taken towards parallelizing protocols. A relative...
Erich M. Nahum, David J. Yates, James F. Kurose, D...