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JSA
2010
158views more  JSA 2010»
15 years 1 months ago
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
TSMC
2010
15 years 1 months ago
An Architecture for Adaptive Algorithmic Hybrids
We describe a cognitive architecture for creating more robust intelligent systems by executing hybrids of algorithms based on different computational formalisms. The architecture ...
Nicholas L. Cassimatis, Perrin G. Bignoli, Magdale...
FCCM
1999
IEEE
210views VLSI» more  FCCM 1999»
15 years 11 months ago
Algorithm Analysis and Mapping Environment for Adaptive Computing Systems: Further Results
Abstract We are developing an integrated algorithm analysis and mapping environment particularly tailored for signal processing applications on Adaptive Computing Systems ACS. Our ...
Eric K. Pauer, Paul D. Fiore, John M. Smith
SIGMOD
2011
ACM
199views Database» more  SIGMOD 2011»
14 years 9 months ago
Schema-as-you-go: on probabilistic tagging and querying of wide tables
The emergence of Web 2.0 has resulted in a huge amount of heterogeneous data that are contributed by a large number of users, engendering new challenges for data management and qu...
Meiyu Lu, Divyakant Agrawal, Bing Tian Dai, Anthon...
CSFW
2012
IEEE
13 years 9 months ago
Provably Secure and Practical Onion Routing
The onion routing network Tor is undoubtedly the most widely employed technology for anonymous web access. Although the underlying onion routing (OR) protocol appears satisfactory...
Michael Backes, Ian Goldberg, Aniket Kate, Esfandi...