Abstract—Cross-layer routing and scheduling algorithms design for wireless backhaul mesh network has attracted much research interest recently. The network is expected to support...
The widening gap between CPU and memory speed has made caches an integral feature of modern highperformance processors. The high degree of configurability of cache memory can requ...
Rahman Hassan, Antony Harris, Nigel P. Topham, Ari...
— This paper presents a computing model for resource-limited mobile devices that might be ubiquitously deployed in private and business environments. The model integrates a stron...
With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip and multicore architect...
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...