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ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
16 years 21 days ago
Fine-grain thermal profiling and sensor insertion for FPGAs
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci...
AVBPA
2005
Springer
303views Biometrics» more  AVBPA 2005»
16 years 7 days ago
Indexing Biometric Databases Using Pyramid Technique
Abstract. Biometric identification has emerged as a reliable means of controlling access to both physical and virtual spaces. In spite of the rapid proliferation of large-scale dat...
Amit Mhatre, Sharat Chikkerur, Venu Govindaraju
FPGA
2004
ACM
147views FPGA» more  FPGA 2004»
16 years 2 days ago
The SFRA: a corner-turn FPGA architecture
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
Nicholas Weaver, John R. Hauser, John Wawrzynek
DATE
2003
IEEE
94views Hardware» more  DATE 2003»
15 years 12 months ago
Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors
Modern embedded processors use data caches with higher and higher degrees of associativity in order to increase performance. A set–associative data cache consumes a significant...
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru...
DFT
2003
IEEE
142views VLSI» more  DFT 2003»
15 years 12 months ago
Exploiting Instruction Redundancy for Transient Fault Tolerance
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
Toshinori Sato