181 search results - page 7 / 37 » High-level area and power estimation for VLSI circuits |
183
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GLVLSI
2010
IEEE
15 years 6 months ago
2010
IEEE
The paper presents a novel high-level power modeling and estimation framework. The approach is based on a synergic integration of aspect-oriented programming(AOP) and SystemC. Mac...
151
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ICCAD
1997
IEEE
15 years 10 months ago
1997
IEEE
Maximum instantaneous power in VLSI circuits has a great impact on circuit's reliability and the design of power and ground lines. To synthesizehighlyreliablesystems,accurate...
166
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ISVLSI
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper describes a technique for re-ordering of scan cells to minimize power dissipation that is also capable of reducing the area overhead of the circuit compared to a random...
152
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GLVLSI
1998
IEEE
15 years 10 months ago
1998
IEEE
Important layout properties of electronic designs include interconnection length values, clock speed, area requirements, and power dissipation. A reliable estimation of those prop...
129
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VLSID
2007
IEEE
16 years 6 months ago
2007
IEEE
A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a g...