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HPDC
2012
IEEE
13 years 9 months ago
vSlicer: latency-aware virtual machine scheduling via differentiated-frequency CPU slicing
Recent advances in virtualization technologies have made it feasible to host multiple virtual machines (VMs) in the same physical host and even the same CPU core, with fair share ...
Cong Xu, Sahan Gamage, Pawan N. Rao, Ardalan Kanga...
ICDCS
2008
IEEE
16 years 1 months ago
DCAR: Distributed Coding-Aware Routing in Wireless Networks
—Recently, there has been a growing interest of using network coding to improve the performance of wireless networks, for example, authors of [1] proposed the practical wireless ...
Jilin Le, John C. S. Lui, Dah-Ming Chiu
ICDCS
2005
IEEE
16 years 7 days ago
Handling Asymmetry in Power Heterogeneous Ad Hoc Networks: A Cross Layer Approach
Power heterogeneous ad hoc networks are characterized by link layer asymmetry: the ability of lower power nodes to receive transmissions from higher power nodes but not vice versa...
Vasudev Shah, Srikanth V. Krishnamurthy
IEEEPACT
2000
IEEE
15 years 11 months ago
Dynamic Branch Prediction for a VLIW Processor
This paper describes the design of a dynamic branchpredictorfor a VLIW processor. The developed branch predictor predicts the direction of a branch, i.e., taken or not taken, and ...
Jan Hoogerbrugge
ICS
1999
Tsinghua U.
15 years 11 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...