6138 search results - page 923 / 1228 » High performance computing through parallel processing |
178
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IPPS
1999
IEEE
15 years 11 months ago
1999
IEEE
In this paper we present the architecture and framework for a benchmark suite that has been developed as part of the DeSiDeRaTa project. The proposed benchmark suite is representat...
207
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ISSS
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
148
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IPPS
1998
IEEE
15 years 11 months ago
1998
IEEE
PULC is a user-level communication library for workstation clusters. PULC provides a multi-user, multi-programming communication library for user level communication on top of high...
193
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IPPS
1998
IEEE
15 years 11 months ago
1998
IEEE
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
159
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ICPP
1993
IEEE
15 years 11 months ago
1993
IEEE
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...