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EDBT
2009
ACM
166views Database» more  EDBT 2009»
16 years 1 months ago
Shore-MT: a scalable storage manager for the multicore era
Database storage managers have long been able to efficiently handle multiple concurrent requests. Until recently, however, a computer contained only a few single-core CPUs, and th...
Ryan Johnson, Ippokratis Pandis, Nikos Hardavellas...
CODES
2005
IEEE
16 years 11 days ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
ASPLOS
2006
ACM
15 years 10 months ago
Comprehensively and efficiently protecting the heap
The goal of this paper is to propose a scheme that provides comprehensive security protection for the heap. Heap vulnerabilities are increasingly being exploited for attacks on co...
Mazen Kharbutli, Xiaowei Jiang, Yan Solihin, Guru ...
FPGA
2004
ACM
174views FPGA» more  FPGA 2004»
16 years 4 days ago
A compiled accelerator for biological cell signaling simulations
The simulation of large systems of biochemical reactions is a key part of research into molecular signaling and information processing in biological cells. However, it can be impr...
John F. Keane, Christopher Bradley, Carl Ebeling
160
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PPOPP
2010
ACM
16 years 4 months ago
Is transactional programming actually easier?
Chip multi-processors (CMPs) have become ubiquitous, while tools that ease concurrent programming have not. The promise of increased performance for all applications through ever ...
Christopher J. Rossbach, Owen S. Hofmann, Emmett W...