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HPCA
2008
IEEE
16 years 6 months ago
DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. Noise-...
Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...
HPCA
2005
IEEE
16 years 6 months ago
Tapping ZettaRAMTM for Low-Power Memory Systems
ZettaRAMTM is a new memory technology under development by ZettaCoreTM as a potential replacement for conventional DRAM. The key innovation is replacing the conventional capacitor...
Ravi K. Venkatesan, Ahmed S. Al-Zawawi, Eric Roten...
RTCSA
2003
IEEE
15 years 11 months ago
An Approximation Algorithm for Broadcast Scheduling in Heterogeneous Clusters
Network of workstation (NOW) is a cost-effective alternative to massively parallel supercomputers. As commercially available off-theshelf processors become cheaper and faster, it...
Pangfeng Liu, Da-Wei Wang, Yi-Heng Guo
DATE
2010
IEEE
113views Hardware» more  DATE 2010»
15 years 11 months ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
CIKM
2008
Springer
15 years 8 months ago
Transaction reordering with application to synchronized scans
Traditional workload management methods mainly focus on the current system status while information about the interaction between queued and running transactions is largely ignore...
Gang Luo, Jeffrey F. Naughton, Curt J. Ellmann, Mi...
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