Sciweavers

6138 search results - page 1043 / 1228
» High performance computing through parallel processing
Sort
View
CVPR
2008
IEEE
16 years 8 months ago
From appearance to context-based recognition: Dense labeling in small images
Traditionally, object recognition is performed based solely on the appearance of the object. However, relevant information also exists in the scene surrounding the object. As supp...
Devi Parikh, C. Lawrence Zitnick, Tsuhan Chen
VLSID
2007
IEEE
206views VLSI» more  VLSID 2007»
16 years 7 months ago
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
CICLING
2009
Springer
16 years 7 months ago
Cross-Language Frame Semantics Transfer in Bilingual Corpora
Recent work on the transfer of semantic information across languages has been recently applied to the development of resources annotated with Frame information for different non-En...
Roberto Basili, Diego De Cao, Danilo Croce, Bonave...
IPPS
2008
IEEE
16 years 29 days ago
Data throttling for data-intensive workflows
— Existing workflow systems attempt to achieve high performance by intelligently scheduling tasks on resources, sometimes even attempting to move the largest data files on the hi...
Sang-Min Park, Marty Humphrey
IPPS
2006
IEEE
16 years 17 days ago
Compatible phase co-scheduling on a CMP of multi-threaded processors
The industry is rapidly moving towards the adoption of Chip Multi-Processors (CMPs) of Simultaneous MultiThreaded (SMT) cores for general purpose systems. The most prominent use o...
Ali El-Moursy, R. Garg, David H. Albonesi, Sandhya...
« Prev « First page 1043 / 1228 Last » Next »