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MICRO
2010
IEEE
130views Hardware» more  MICRO 2010»
15 years 4 months ago
Pseudo-Circuit: Accelerating Communication for On-Chip Interconnection Networks
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
Minseon Ahn, Eun Jung Kim
ICFP
2009
ACM
16 years 7 months ago
Partial memoization of concurrency and communication
Memoization is a well-known optimization technique used to eliminate redundant calls for pure functions. If a call to a function f with argument v yields result r, a subsequent ca...
Lukasz Ziarek, K. C. Sivaramakrishnan, Suresh Jaga...
JPDC
2006
141views more  JPDC 2006»
15 years 6 months ago
M-TREE: A high efficiency security architecture for protecting integrity and privacy of software
Secure processor architectures enable new sets of applications such as commercial grid computing, software copy protection and secure mobile agents by providing secure computing e...
Chenghuai Lu, Tao Zhang, Weidong Shi, Hsien-Hsin S...
ANCS
2007
ACM
15 years 10 months ago
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture
Network-on-Chip (NoC) architectures provide a scalable solution to the wire delay constraints in deep submicron VLSI designs. Recent research into the optimization of NoC architec...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
TON
1998
93views more  TON 1998»
15 years 6 months ago
An evaluation of flow control in group communication
Abstract— Group communication services have been successfully used to construct applications with high availability, dependability, and real-time responsiveness requirements. Flo...
Shivakant Mishra, Lei Wu