Modern routers and switch fabrics can have hundreds of input and output ports running at up to 10 Gb/s; 40 Gb/s systems are starting to appear. At these rates, the performance of ...
Sailesh Kumar, Jonathan S. Turner, Patrick Crowley
Abstract—Message progression schemes that enable communication and computation to be overlapped have the potential to improve the performance of parallel applications. With curre...
New technologies have recently emerged to challenge the very nature of computing: multicore processors, virtualized operating systems and networks, and data-center clouds. One can...
In this paper, we describe two new ideas by which HPF compiler can deal with irregular computations e ectively. The rst mechanism invokes a user speci ed mapping procedure via a s...
—A novel architecture was proposed in [1] to address scalability issues in large, high speed packet switches. The architecture proposed in [1], namely OBIG (output buffers with i...
Aditya Dua, Benjamin Yolken, Nicholas Bambos, Wlad...