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ICASSP
2011
IEEE
14 years 11 months ago
A robust feature extraction algorithm based on class-Modular Image Principal Component Analysis for face verification
Face verification systems reach good performance on ideal environmental conditions. Conversely, they are very sensitive to non-controlled environments. This work proposes the cla...
Jose Francisco Pereira, Rafael M. Barreto, George ...
DATE
2009
IEEE
183views Hardware» more  DATE 2009»
16 years 2 months ago
SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips
Three-dimensional integrated circuits are a promising approach to address the integration challenges faced by current Systems on Chips (SoCs). Designing an efficient Network on C...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
EDBT
2004
ACM
147views Database» more  EDBT 2004»
16 years 7 months ago
Efficient Query Evaluation over Compressed XML Data
XML suffers from the major limitation of high redundancy. Even if compression can be beneficial for XML data, however, once compressed, the data can be seldom browsed and queried i...
Andrei Arion, Angela Bonifati, Gianni Costa, Sandr...
DATE
2008
IEEE
174views Hardware» more  DATE 2008»
16 years 2 months ago
Calibration of Integrated CMOS Hall Sensors Using Coil-on-Chip in ATE Environment
Due to high demand for hall sensors mostly in the automotive and industrial applications, development and manufacturing of hall sensors in System-on-Chip (SoC) became more importa...
Mustafa Badaroglu, Guy Decabooter, Francois Laulan...
SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
16 years 25 days ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar