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NOCS
2007
IEEE
16 years 1 months ago
Implementing DSP Algorithms with On-Chip Networks
Many DSP algorithms are very computationally intensive. They are typically implemented using an ensemble of processing elements (PEs) operating in parallel. The results from PEs n...
Xiang Wu, Tamer Ragheb, Adnan Aziz, Yehia Massoud
CGO
2007
IEEE
16 years 1 months ago
Microarchitecture Sensitive Empirical Models for Compiler Optimizations
This paper proposes the use of empirical modeling techniques for building microarchitecture sensitive models for compiler optimizations. The models we build relate program perform...
Kapil Vaswani, Matthew J. Thazhuthaveetil, Y. N. S...
VALUETOOLS
2006
ACM
164views Hardware» more  VALUETOOLS 2006»
16 years 1 months ago
Analysis of Markov reward models using zero-suppressed multi-terminal BDDs
High-level stochastic description methods such as stochastic Petri nets, stochastic UML statecharts etc., together with specifications of performance variables (PVs), enable a co...
Kai Lampka, Markus Siegle
IMC
2005
ACM
16 years 1 months ago
Understanding Congestion in IEEE 802.11b Wireless Networks
The growing popularity of wireless networks has led to cases of heavy utilization and congestion. In heavily utilized wireless networks, the wireless portion of the network is a m...
Amit P. Jardosh, Krishna N. Ramachandran, Kevin C....
VLDB
2002
ACM
141views Database» more  VLDB 2002»
16 years 7 months ago
Data page layouts for relational databases on deep memory hierarchies
Relational database systems have traditionally optimized for I/O performance and organized records sequentially on disk pages using the N-ary Storage Model (NSM) (a.k.a., slotted ...
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill