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ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
16 years 1 months ago
Performance pathologies in hardware transactional memory
Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously propos...
Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Y...
SIGMETRICS
2010
ACM
143views Hardware» more  SIGMETRICS 2010»
16 years 6 days ago
Practical performance models for complex, popular applications
Perhaps surprisingly, no practical performance models exist for popular (and complex) client applications such as Adobe’s Creative Suite, Microsoft’s Office and Visual Studio...
Eno Thereska, Bjoern Doebel, Alice X. Zheng, Peter...
DAC
2005
ACM
15 years 9 months ago
A combined feasibility and performance macromodel for analog circuits
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
Mengmeng Ding, Ranga Vemuri
VLSID
2008
IEEE
150views VLSI» more  VLSID 2008»
16 years 7 months ago
PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Nik...
SIGMETRICS
2008
ACM
15 years 7 months ago
Ironmodel: robust performance models in the wild
Traditional performance models are too brittle to be relied on for continuous capacity planning and performance debugging in many computer systems. Simply put, a brittle model is ...
Eno Thereska, Gregory R. Ganger