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ASPLOS
1992
ACM
15 years 11 months ago
Efficient Superscalar Performance Through Boosting
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...
Michael D. Smith, Mark Horowitz, Monica S. Lam
ISCA
2010
IEEE
247views Hardware» more  ISCA 2010»
15 years 10 months ago
An integrated GPU power and performance model
GPU architectures are increasingly important in the multi-core era due to their high number of parallel processors. Performance optimization for multi-core processors has been a c...
Sunpyo Hong, Hyesoon Kim
NSDI
2004
15 years 8 months ago
Beehive: O(1) Lookup Performance for Power-Law Query Distributions in Peer-to-Peer Overlays
Structured peer-to-peer hash tables provide decentralization, self-organization, failure-resilience, and good worst-case lookup performance for applications, but suffer from high ...
Venugopalan Ramasubramanian, Emin Gün Sirer
IPPS
2007
IEEE
16 years 1 months ago
Performance Analysis of a Family of WHT Algorithms
This paper explores the correlation of instruction counts and cache misses to runtime performance for a large family of divide and conquer algorithms to compute the Walsh–Hadama...
Michael Andrews, Jeremy Johnson
ISCC
2006
IEEE
127views Communications» more  ISCC 2006»
16 years 27 days ago
Performance Evaluation of Mobile IPv6 Handover Extensions in an IEEE 802.11b Wireless Network Environment
— In order to support mobile users, the basic Internet protocols have been extended with protocols (e.g., Mobile IPv6) for intercepting and forwarding packets to a mobile and pos...
Johnny Lai, Y. Ahmet Sekercioglu, Norbert Jordan, ...