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SBCCI
2005
ACM
115views VLSI» more  SBCCI 2005»
16 years 7 days ago
Design of a decompressor engine on a SPARC processor
Code compression, initially conceived as an effective technique to reduce code size in embedded systems, today also brings advantages in terms of performance and energy consumpti...
Richard E. Billo, Rodolfo Azevedo, Guido Araujo, P...
ICALT
2007
IEEE
16 years 1 months ago
A Conceptual Structure for Organizational Learning and Organizational Performance
This paper constructs a conceptual structure for organizational learning and organizational performance based on the core competitive capability view. Based on the research of org...
Li Zhang, Qiong Jia, Ping Li
DATE
1998
IEEE
75views Hardware» more  DATE 1998»
15 years 11 months ago
Power-Simulation of Cell Based ASICs: Accuracy- and Performance Trade-Offs
Within this paper the gate-level power-simulation tool GliPS (Glitch Power Simulator) is presented, which gives excellent accuracy (in the range of transistor-level simulators) at...
Dirk Rabe, Gerd Jochens, Lars Kruse, Wolfgang Nebe...
SIGCOMM
2003
ACM
15 years 12 months ago
A measurement-based analysis of multihoming
Multihoming has traditionally been employed by stub networks to enhance the reliability of their network connectivity. With the advent of commercial “intelligent route controlâ€...
Aditya Akella, Bruce M. Maggs, Srinivasan Seshan, ...
IPPS
2000
IEEE
15 years 10 months ago
ATOLL, a New Switched, High Speed Interconnect in Comparison to Myrinet and SCI
Abstract. While standard processors achieve supercomputer performance, a performance gap exists between the interconnect of MPP's and COTS. Standard solutions like Ethernet ca...
Markus Fischer, Ulrich Brüning, Jörg Klu...