Sciweavers

18572 search results - page 319 / 3715
» High performance C
Sort
View
TC
2010
15 years 5 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...
ICSE
2007
IEEE-ACM
16 years 24 days ago
The Future of Software Performance Engineering
Performance is a pervasive quality of software systems; everything affects it, from the software itself to all underlying layers, such as operating system, middleware, hardware, c...
C. Murray Woodside, Greg Franks, Dorina C. Petriu
AICT
2009
IEEE
123views Communications» more  AICT 2009»
15 years 11 months ago
Performance Evaluation of Multicast Routing over Multilayer Multistage Interconnection Networks
Multilayer MINs have emerged mainly due to the increased need for routing capacity in the presence of multicast and broadcast traffic, their performance prediction and evaluation ...
D. C. Vasiliadis, G. E. Rizos, C. Vassilakis, E. G...
172
Voted
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
16 years 6 days ago
A technique for low energy mapping and routing in network-on-chip architectures
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
Krishnan Srinivasan, Karam S. Chatha
DATE
2009
IEEE
249views Hardware» more  DATE 2009»
16 years 1 months ago
White box performance analysis considering static non-preemptive software scheduling
—In this paper, a novel approach for integrating static non-preemptive software scheduling in formal bottom-up performance evaluation of embedded system models is described. The ...
Alexander Viehl, Michael Pressler, Oliver Bringman...