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DOCENG
2004
ACM
16 years 1 days ago
Logic-based XPath optimization
XPath [16] was introduced by the W3C as a standard language for specifying node selection, matching conditions, and for computing values from an XML document. XPath is now used in...
Pierre Genevès, Jean-Yves Vion-Dury
CODES
2003
IEEE
15 years 12 months ago
A modular simulation framework for architectural exploration of on-chip interconnection networks
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
Tim Kogel, Malte Doerper, Andreas Wieferink, Raine...
IPPS
2009
IEEE
16 years 1 months ago
Performance modeling in action: Performance prediction of a Cray XT4 system during upgrade
We present predictive performance models of two of the petascale applications, S3D and GTC, from the DOE Office of Science workload. We outline the development of these models and...
Kevin J. Barker, Kei Davis, Darren J. Kerbyson
ICCD
2002
IEEE
114views Hardware» more  ICCD 2002»
16 years 3 months ago
Balancing the Interconnect Topology for Arrays of Processors between Cost and Power
High performance SoC requires nonblocking interconnections between an array of processors built on one chip. With the advent of deep sub-micron technologies, switches are becoming...
Esther Y. Cheng, Feng Zhou, Bo Yao, Chung-Kuan Che...
DAC
2001
ACM
16 years 7 months ago
Clustered VLIW Architectures with Predicated Switching
In order to meet the high throughput requirements of applications exhibiting high ILP, VLIW ASIPs may increasingly include large numbers of functional unitsFUs. Unfortunately, `sw...
Margarida F. Jacome, Gustavo de Veciana, Satish Pi...