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ASYNC
2005
IEEE
132views Hardware» more  ASYNC 2005»
16 years 7 days ago
High Level Synthesis of Timed Asynchronous Circuits
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
Tomohiro Yoneda, Atsushi Matsumoto, Manabu Kato, C...
ENGL
2007
93views more  ENGL 2007»
15 years 6 months ago
A High Precision Bandgap Reference Used in Power Management ICs
—A 2.5V high precision BiCMOS bandgap reference with supply voltage range of 6V to 18V was proposed and realized. It could be applied to lots of Power Management ICs (Intergrated...
Gu Shurong, Wu Xiaobo, Yan Xiaolang
CORR
2008
Springer
76views Education» more  CORR 2008»
15 years 6 months ago
Design and Fabrication of the Suspended High-Q Spiral Inductors with X-Beams
In this paper, deep sub-micron CMOS process compatible high Q on chip spiral inductors with air gap structure were designed and fabricated. In the design the electromagnetic solve...
M. C. Hsieh, D. K. Jair, Y. K. Fang, C. S. Lin
IPPS
2006
IEEE
16 years 19 days ago
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping...
RSP
2005
IEEE
155views Control Systems» more  RSP 2005»
16 years 6 days ago
Optimization Techniques for ADL-Driven RTL Processor Synthesis
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
Oliver Schliebusch, Anupam Chattopadhyay, Ernst Ma...